Research simulates computer chip performance

Resit Sendag, lrft, University of Rhode Island professor of computer engineering, and URI graduate student Will Simoneau. / COURTESY URI
Resit Sendag, lrft, University of Rhode Island professor of computer engineering, and URI graduate student Will Simoneau. / COURTESY URI

SOUTH KINGSTOWN – Resit Sendag, University of Rhode Island professor of computer engineering, and URI graduate student Will Simoneau have developed a tool to simulate computer chip performance in the future.

Today’s computer chips traditionally operate with four to eight processors working together, but future chips are likely to use hundreds.

“The tools we use to predict the behavior of large multi-core systems are very limited,” Sendag said in prepared remarks. “Current practice is to use software simulators to model multi-core systems, but these simulators are thousands of times slower than the systems they model.”

Sendag and Simoneau have built their prototype using Field Programmable Gate Arrays, which enable users to combine a wide variety of components and build any type of hardware configuration needed.

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“Our prototype is easier to use than what else is available, it’s fully open source, and it’s already online for others to use,” said Simoneau. “The source code is smaller than most other similar projects, which means there is less to understand, and the hardware it generates is faster.”

Simoneau, described the tool as “a computer code description of hardware, written in such a way that you can alter the design, then build it on any suitable FPGA chip within the family. You can build a small one-processor system with small caches, large multi-processor systems with large caches, or anything in between.”

The platform is designed to be used by the computer architecture research community and others interested in operating system research. It is also useful to those seeking to debug software programs.

Simoneau and Sendag presented a paper about the platform at the IEEE International Symposium on Performance Analysis of Systems and Software in April, where it was met with enthusiasm, according to a URI release.

The URI scientists plan to present their new platform at meetings with Intel and IBM in coming weeks, with the hope that they may support future developments.

“We have lots more ideas on how to extend this to different models, and we think that industry will be very interested in those ideas,” Sendag said.

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